• DocumentCode
    1639520
  • Title

    VLSI package reliability risk due to accelerated environmental testing

  • Author

    Haupert, David ; Chen, Fu-Gin ; Lee, David

  • Author_Institution
    Control Data Corp., St. Paul, MN, USA
  • fYear
    1989
  • Firstpage
    938
  • Abstract
    The use of accelerated environmental testing as part of the printed circuit board manufacturing process has been shown to trigger a corrosion-related failure mode. The authors present details of failures observed on advanced ceramic packages used to house CMOS VLSI components. Key factors to be considered before implementing accelerated environmental test programs are discussed
  • Keywords
    CMOS integrated circuits; VLSI; corrosion; environmental testing; integrated circuit testing; life testing; packaging; printed circuit testing; reliability; CMOS; VLSI; accelerated environmental testing; ceramic packages; corrosion-related failure; package reliability risk; printed circuit board manufacturing; Ceramics; Circuit testing; Corrosion; Humidity; Life estimation; Manufacturing processes; Packaging; Printed circuits; Silver; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1989. Proceedings. Meeting the Tests of Time., International
  • Conference_Location
    Washington, DC
  • Type

    conf

  • DOI
    10.1109/TEST.1989.82390
  • Filename
    82390
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1639520