DocumentCode
1640125
Title
A placement algorithm for the optimal synthesized design of complex MOS gates
Author
Serrat, Yvan
Author_Institution
Dept. of Appl. Electron., R. Inst. of Technol., Stockholm, Sweden
fYear
1989
Firstpage
909
Abstract
A method is presented for transistor placement which achieves efficient optimization of the complex MOS gate layout. The method involves physical modeling of the problem followed by a simulation algorithm, avoiding the need to solve a set of nonlinear equations. Analysis and logical synthesis of the basic switching cell are also summarized
Keywords
MOS integrated circuits; circuit layout CAD; logic CAD; logic gates; optimisation; basic switching all logical synthesis; basic switching cell analysis; complex MOS gate layout; optimal synthesized design; physical modeling; placement algorithm; simulation algorithm; transistor placement; Algorithm design and analysis; Circuit synthesis; Computational modeling; Logic design; MOSFETs; Merging; Minimization; Optimization methods; Power dissipation; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location
Portland, OR
Type
conf
DOI
10.1109/ISCAS.1989.100499
Filename
100499
Link To Document