DocumentCode
1641074
Title
Polarization encoded optical shadow casting logic units: Design of trinary half subtractor using various input coding scheme
Author
Al Hadi, Abdullah ; Ahmed, Jamal Uddin
Author_Institution
Dept. of Energy Eng. & Manage., Inst. Super. Tecnico, Lisbon, Portugal
fYear
2013
Firstpage
594
Lastpage
598
Abstract
In this paper we evolve several input pixel pattern scheme for trinary half Subtractor design. This is a follow-up paper of half adder design of A. A. Hadi et. al. 2012 [1], where various coding scheme were designed only for logic unit design of trinary half adder. Different input coding schemes for half subtractor are calculated in this paper by changing the minterm grouping conditions. New pixel patterns are designed based on the design of R. A. Rizvi et. el. 1991[6], which are more efficient, cost effective and convenient for integrating larger complex design. The POSC [2] modified algorithm is used to design and implement trinary half Subtractor. A set of POSC equation are obtained from the truth table of the desired arithmetic unit. Each design has various merits on other designs.
Keywords
logic circuits; logic design; optical logic; POSC equation; arithmetic unit; coding scheme; input pixel pattern scheme; logic unit design; minterm grouping conditions; polarization encoded optical shadow casting logic units; trinary half adder design; trinary half subtractor design; Adders; Casting; Decoding; Encoding; Equations; Optical design; Optical polarization; Half Subtractor design; Optical Computing; Polarization Encoded Optical Shadow Casting (POSC); Trinary logic design;
fLanguage
English
Publisher
ieee
Conference_Titel
Advances in Computing, Communications and Informatics (ICACCI), 2013 International Conference on
Conference_Location
Mysore
Print_ISBN
978-1-4799-2432-5
Type
conf
DOI
10.1109/ICACCI.2013.6637239
Filename
6637239
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