A 16Mb MRAM featuring bootstrapped write drivers

Author

DeBrosse, J. ; Arndt, C. ; Barwin, C. ; Bette, A. ; Gogl, D. ; Gow, E. ; Hoenigschmid, H. ; Lammers, S. ; Lamorey, M. ; Lu, Y. ; Maffitt, T. ; Maloney, K. ; Obermeyer, W. ; Sturm, A. ; Viehmann, H. ; Willmott, D. ; Wood, M. ; Gallagher, W.J. ; Mueller, G.

Author_Institution

IBM Microeletronics Div., Essex Junction, VT, USA

fYear

2004

Firstpage

454

Lastpage

457

Abstract

A 16Mb Magnetic Random Access Memory (MRAM) is demonstrated in 0.18 μm three-Cu-level CMOS with a three-level MRAM process adder. The chip, the highest density MRAM reported to date, utilizes a 1.42 μm² 1-Transistor 1-Magnetic Tunnel Junction (1T1MTJ) cell, measures 79mm² and features a ×16 asynchronous SRAM-like interface. The paper describes the cell, architecture, and circuit techniques unique to multi-Mb MRAM design, including a novel bootstrapped write driver circuit. Hardware results are presented.

Keywords

CMOS memory circuits; bootstrap circuits; magnetic tunnelling; random-access storage; 0.18 μm three-Cu-level CMOS; 0.18 micron; 16 Mbit; 16Mb MRAM; Magnetic Random Access Memory; bootstrapped write drivers; magnetic tunnel junction; Adders; CMOS process; CMOS technology; Density measurement; Driver circuits; Magnetic tunneling; Microelectronics; Random access memory; Rivers; Semiconductor device measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on

Print_ISBN

0-7803-8287-0

Type

conf

DOI

10.1109/VLSIC.2004.1346648

Filename

1346648