DocumentCode
164127
Title
Morphing digital functional verification to meet mixed signal challenges
Author
Cianga, Alexandru I. ; Tepus, Cristian
Author_Institution
Infineon Technol., Bucharest, Romania
fYear
2014
fDate
13-15 Oct. 2014
Firstpage
219
Lastpage
222
Abstract
This paper describes a new structured approach for mixed-signal system simulation. Traditional pre-silicon verification follows two separate tracks: one for analog, another for digital. Our paper shows how to make the two tracks converge. We have integrated analog simulation with digital functional verification. This is the “bridge head” for true mixed-signal pre-silicon verification.
Keywords
elemental semiconductors; mixed analogue-digital integrated circuits; silicon; system-on-chip; SoC functional verification; analog simulation; digital functional verification; mixed signal challenges; mixed-signal pre-silicon verification; mixed-signal system simulation; pre-silicon verification; system-on-chip; Clocks; Engines; Hardware design languages; Load modeling; Runtime; System-on-chip; Transistors; Behavioral Models; Functional Verification; Mixed-Signal; System on Chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Conference (CAS), 2014 International
Conference_Location
Sinaia
ISSN
1545-827X
Print_ISBN
978-1-4799-3916-9
Type
conf
DOI
10.1109/SMICND.2014.6966440
Filename
6966440
Link To Document