DocumentCode :
1641272
Title :
An efficient algorithm for optimal PLA folding
Author :
Yang, Yeong-Yil ; Kyung, Chong-Min
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
fYear :
1989
Firstpage :
927
Abstract :
A three-step heuristic algorithm for PLA column folding and row folding of column-folded PLA is presented. The algorithm is significantly faster than earlier algorithms and provides nearly optimal results. The three steps are min-cut partition of vertices in the column (or row) intersection graph, determination of product order using Fiduccia´s min-net cut algorithm, and head-tail pairing for column folding (some heuristics are proposed for deciding row folding pairs). The time complexity of this algorithm is O(n2 log n), compared to the O(n3) to O(n 4) of the earlier algorithms. For a test PLA with 23 inputs, 19 outputs, and 52 products, the number of column folding pairs obtained using this algorithm is 20, which is optimal compared to the 17 obtained previously
Keywords :
heuristic programming; logic CAD; logic arrays; Fiduccia´s min-net cut algorithm; PLA column folding; algorithm time complexity; column folding pairs; column intersection graph; column-folded PLA row folding; efficient algorithm; head-tail pairing; nearly optimal results; product order determination; row folding pairs; row intersection graph; test PLA; three-step heuristic algorithm; vertices min-cut partition; Heuristic algorithms; Partitioning algorithms; Programmable logic arrays; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location :
Portland, OR
Type :
conf
DOI :
10.1109/ISCAS.1989.100503
Filename :
100503
Link To Document :
بازگشت