Title :
The Giga Hz 1 Mb mask programmable ROM chip with SBD array, logic gate, and SRAM cores
Author :
Chang, Augustine
Author_Institution :
Golden Silicon Technol., Mountain View, CA, USA
Abstract :
SCMOS is a low cost, high capacity, high speed, high yield, and power saving VLSI device platform technology for microelectronics chips and modules. Benefits include: (1) Uses the complementary Low threshold Schottky Barrier Diodes (LtSBD or simply SBD). (2) Integrated the SBD and CMOS transistor as basic circuit elements for Analog, Logic, and Memory (ALM) macros. (3) Single power supply chip. Circuits provide both static and dynamic functions. (4) Uses the low cost CMOS Logic compatible processes, with extremely low power and high speed. (5) Provides Zero Stress Bias (ZSB) on selected blocks.
Keywords :
CMOS memory circuits; SRAM chips; Schottky diodes; logic arrays; logic gates; read-only storage; CMOS logic compatible process; CMOS transistor; SBD array; SCMOS; SRAM core; complementary low threshold Schottky barrier diodes; logic gate; mask programmable ROM chip; power saving VLSI device; single power supply chip; zero stress bias; Arrays; CMOS integrated circuits; Computer aided engineering; Equations; Power demand; Random access memory; Read only memory;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-5797-7
DOI :
10.1109/ICSICT.2010.5667814
