Title :
A 57–66 GHz 12.9-dBm miniature power amplifier with 23.4% PAE in 65-nm CMOS
Author :
Wei-Heng Lin ; Tian-Wei Huang ; Huei Wang ; Wang, Jiacheng
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
A 60-GHz power amplifier (PA) using 65-nm bulk MS/RF CMOS technology is presented in this paper. To meet 10-dBm regulation limit of transmit power, direct-combining topology is selected for low-loss and high-efficiency output stage design. The first-order matching networks for input, output and inter-stage matching are used to cover 57-66-GHz world-wide unlicensed millimeter-wave bands. This MMIC achieves 42% drain efficiency and peak power added efficiency (PAE) of 23.4% at 16.7-dB gain, 12.9-dBm saturated power biased under supply voltage of 1.2-V, with 68.4-mW dc power consumption at PSAT.
Keywords :
CMOS integrated circuits; MMIC; power amplifiers; radiofrequency integrated circuits; MMIC; MS/RF CMOS technology; PAE; direct-combining topology; drain efficiency; first-order matching networks; frequency 57 GHz to 66 GHz; inter-stage matching; miniature power amplifier; regulation limit; supply voltage; transmit power; voltage 1.2 V; world-wide unlicensed millimeter-wave bands; Broadband communication; CMOS integrated circuits; CMOS technology; Gain; Power amplifiers; Power generation; Topology; 60 GHz; CMOS; MMIC; power amplifier (PA);
Conference_Titel :
Microwave Integrated Circuits Conference (EuMIC), 2012 7th European
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4673-2302-4
Electronic_ISBN :
978-2-87487-026-2
