• DocumentCode
    1641651
  • Title

    A new enhanced noise tolerance technique for a 600V high voltage IC

  • Author

    Yamaji, Masahara ; Jonishi, Akihiro ; Tanaka, Takahide ; Sumida, Hitoshi ; Hashimoto, Yoshio

  • Author_Institution
    Fuji Electr. Co. Ltd., Fuji, Japan
  • fYear
    2015
  • Firstpage
    108
  • Lastpage
    111
  • Abstract
    A new 600V high-voltage IC (HVIC) featuring a high noise tolerance is proposed. The purpose of the proposed HVIC is to achieve the high noise tolerance without an increase of the fabrication cost. The basic device concept is to arrange a P-separation layer around the high-side control part, which is called a new self-shielding structure, to reduce a hole current injection under the condition of negative transient voltage noise. By applying the new self-shielding structure in the HVIC, more than 3x higher noise tolerance (-95V/1μs) and 20% die shrink can be obtained compared with a conventional HVIC, without additional fabrication process. This means the noise tolerance of the fabricated HVIC with proposed structure is high enough to be applied to over 600V/50A class power conversion applications.
  • Keywords
    integrated circuit manufacture; power integrated circuits; HVIC; P-separation layer; current 50 A; die shrink; enhanced noise tolerance technique; fabrication cost; high noise tolerance; high-side control part; high-voltage IC; hole current injection; negative transient voltage noise; power conversion applications; self-shielding structure; voltage 600 V; Electric potential; Integrated circuits; Logic gates; Noise; Silicon; Substrates; Transient analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics and Drive Systems (PEDS), 2015 IEEE 11th International Conference on
  • Conference_Location
    Sydney, NSW
  • Type

    conf

  • DOI
    10.1109/PEDS.2015.7203438
  • Filename
    7203438