DocumentCode :
1641861
Title :
Multifunctional integrated substrate technology for high density SOP packaging
Author :
Liu, Fuhan ; Tummala, Rao R. ; Sundaram, Venky ; Guidotti, Daniel ; Huang, Zhaoran ; Chang, Y.-J. ; Abothu, Isaac Robin ; Raj, P. Markondeya ; Bhattacharya, Swapan ; Balaraman, Devarajan ; Chang, G.K.
Author_Institution :
NSF-Microsyst. Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
2004
Firstpage :
83
Lastpage :
90
Abstract :
Advanced substrates or printed circuit boards (PCBs) are an essential part for building the advanced IC packages (BGA, CSP, flip chip and wafer-level package), MCMs, 3D package, system-in-package (SiP), system-on-package (SOP), and all high density microelectronic systems. As processors and memory move towards nanometer-size features and processor clock speeds increase 60% per year, development of next generation system level substrates technology is required to keep pace both the wiring density and high performance requirements. The packaging research center at Georgia Tech has been developing system-on-package (SOP) technology for future high density, high performance systems. This paper introduces three important aspects for future advanced package substrates or PCBs for high density and high performance systems applications. They are (1) ultra-high density wiring technology with ultra fine circuit traces and microvias, including novel non-conformal stacked vias. The ultra high wiring density substrate is critical for the use of fine pitch, high I/O count, flip chip application and. microsystem miniaturization. (2) Integrations of passive components, and (3) integrations of high speed optical interconnects for chip-to-chip data link. This will be the revolutionary advance in future PCBs. We have developed ultra high density wiring technology by a combination of ultra-fine lines and space of 10 μm or less and stacked microvias. We have developed optically smooth organic surfaces for optical components integration and have demonstrated a 10 Gbps chip-to-chip data rate on PCBs. The future high density, high performance, microsystems can be realized by the combinations of high density wiring technology and optoelectronics integration. Details of this work are the subject of this paper.
Keywords :
integrated optoelectronics; metallisation; packaging; printed circuit manufacture; substrates; 10 Gbit/s; 3D package; BGA package; CSP package; Georgia Tech; MCM; advanced IC packages; chip-to-chip data link; chip-to-chip data rate; fine pitch application; flip chip application; flip chip packages; high I/O count; high density SOP packaging; high density microelectronic systems; high density systems; high performance requirements; high performance systems; high speed optical interconnects; microsystem miniaturization; multifunctional integrated substrate; nanometer-size features; nonconformal stacked vias; optical components integration; optically smooth organic surfaces; optoelectronics integration; packaging research center; passive components integration; printed circuit boards; processor clock; stacked microvias; system level substrates; system-in-package; system-on-package; ultra fine circuit traces; ultra fine microvias; ultra-fine lines; ultra-fine space; ultra-high density wiring; wafer-level package; wiring density; Chip scale packaging; Flip chip; Integrated circuit packaging; Integrated circuit technology; Optical devices; Optical interconnections; Printed circuits; Space technology; Wafer scale integration; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Density Microsystem Design and Packaging and Component Failure Analysis, 2004. HDP '04. Proceeding of the Sixth IEEE CPMT Conference on
Print_ISBN :
0-7803-8620-5
Type :
conf
DOI :
10.1109/HPD.2004.1346678
Filename :
1346678
Link To Document :
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