• DocumentCode
    164235
  • Title

    Simplified FPGA implementation of the generalized space vector pulse width modulation (GSVPWM) for three wire three-phase inverters

  • Author

    Restrepo, Jose ; Viola, Julio ; Quizhpi, Flavio

  • Author_Institution
    Prometeo-SENESCYT, Quito, Ecuador
  • fYear
    2014
  • fDate
    Sept. 28 2014-Oct. 1 2014
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    This paper presents the development and implementation on a low-cost FPGA, of a fast generalized space vector pulse width modulation (GSVPWM) scheme. The implemented pulse width modulation uses a standard carrier-based triangle interception method (SPWM).
  • Keywords
    PWM invertors; field programmable gate arrays; FPGA; GSVPWM scheme; SPWM; fast generalized space vector pulse width modulation scheme; field programmable gate array; standard carrier-based triangle interception method; three wire three-phase inverter; Educational institutions; Field programmable gate arrays; Power engineering; Space vector pulse width modulation; Vectors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Engineering Conference (AUPEC), 2014 Australasian Universities
  • Conference_Location
    Perth, WA
  • Type

    conf

  • DOI
    10.1109/AUPEC.2014.6966495
  • Filename
    6966495
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=164235