Title :
Outlook for 15nm CMOS research technologies
Author :
Yang, Fu-Liang ; Chen, Hou-Yu ; Huang, Chien-Chao
Author_Institution :
Nat. Nano Device Labs. (NDL), Hsinchu, Taiwan
Abstract :
So far the most aggressive manufacturing forecast for 22nm technology node is in late 2011, and there still remains many arguments for its next generation, 15nm manufacturing technologies. The major obstacles in front of the manufacturing are (1) high cost fine patterning technology, (2) tradeoff of SRAM cell size and performance, (3) increasing variability, (4) short channel effect control, etc. In this paper our efforts tried to access 15nm CMOS device for preliminary research study will be reviewed, including (1) Nano-injection lithography, (2) operation of record small SRAM cell, (3) discrete dopant simulation, and (4) device design for extremely scaled device.
Keywords :
CMOS integrated circuits; SRAM chips; CMOS device design; CMOS research technology; SRAM cell size; discrete dopant simulation; fine patterning technology; manufacturing technology; nano-injection lithography; short channel effect control; size 15 nm; size 22 nm; FinFETs; Lithography; Logic gates; Nanoscale devices; Random access memory; Semiconductor process modeling;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-5797-7
DOI :
10.1109/ICSICT.2010.5667850
