DocumentCode
1642595
Title
Effect of die attach configuration in stacked die packages
Author
Zhang, Jack ; Todd, Michael ; Huneke, Jim
Author_Institution
Henkel Technol., San Diego, CA, USA
fYear
2004
Firstpage
231
Lastpage
235
Abstract
To accommodate the ever-increasing pressure of reduction in size, weight and cost, while provide more functionality and better reliability, many innovative electronic packaging solutions have been developed. Among them, stacked die packages offer smallest foot-print and thinnest profile in a cost-effective way and have been widely implemented in ASIC, memory, Ethernet controller, and other packages. However, new challenges keep emerging as more dies are stacked up and die thickness decreases to 50 to 75 μm level. In this paper, the improvement in die attaches to better suit stacked die configuration was discussed, including replacement of dummy die (spacer die) with spacer die attach pastes, adjustment of die attach properties and geometry to minimize molding compound/die attach delamination at die overhang area, comparison of film and paste die attaches. The detailed comparison in warpage and stresses was supported by finite element analysis.
Keywords
finite element analysis; integrated circuit packaging; microassembling; ASIC; Ethernet controller; die attach configuration; die attach delamination; die overhang area; die thickness; dummy die; electronic packaging solutions; films; finite element analysis; molding compound; paste die attaches; spacer die attach paste; stacked die configuration; stacked die packages; warpage; Assembly; Cost function; Delamination; Electronics packaging; Finite element methods; Microassembly; Packaging machines; Semiconductor device modeling; Stress; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
High Density Microsystem Design and Packaging and Component Failure Analysis, 2004. HDP '04. Proceeding of the Sixth IEEE CPMT Conference on
Print_ISBN
0-7803-8620-5
Type
conf
DOI
10.1109/HPD.2004.1346704
Filename
1346704
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