Title :
Single grain thin-film-transistor (TFT) with SOI CMOS performance formed by metal-induced-lateral-crystallization
Author :
Jagar, S. ; Chan, M. ; Poon, M.C. ; Hongmei Wang ; Ming Qin ; Ko, P.K. ; Yangyuan Wang
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong
Abstract :
Metal-induced-lateral-crystallization (MILC) followed by high temperature annealing has been used for the first time to form, large single grain silicon from amorphous silicon. Polysilicon with grain size ranging from ten to hundred of microns can be formed by this method. By individually crystallizing the active area of a TFT, the entire transistor can be formed on a single or a small number of silicon grains with good controllability, thus similar to SOI structure. Test devices with thin t/sub ox/=120 /spl Aring/ have been fabricated and the performance is verified to be comparable to SOI MOSFETs. The scaling property of the grain enhanced TFTs has also been studied. The minimization of the device dimension results in smaller probability for the channel region of a TFT to cover multiple grains, which leads to better device performance.
Keywords :
annealing; crystallisation; grain boundaries; grain size; leakage currents; semiconductor device reliability; thin film transistors; 120 angstrom; Si; active area; channel region; controllability; device dimension; high temperature annealing; metal-induced-lateral-crystallization; multiple grains; scaling property; single grain thin-film-transistor; Annealing; Crystallization; Grain boundaries; Grain size; Rough surfaces; Silicon; Surface roughness; Surface topography; Temperature; Thin film transistors;
Conference_Titel :
Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-5410-9
DOI :
10.1109/IEDM.1999.824154
