• DocumentCode
    1643163
  • Title

    Single electron and few electron memory cells

  • Author

    Ahmed, H.

  • Author_Institution
    Cavendish Lab., Cambridge Univ., UK
  • fYear
    1999
  • Firstpage
    363
  • Lastpage
    366
  • Abstract
    Memory cells based on single electron devices fabricated with silicon technology will be required if the progress of memories to the multi-gigascale together with high speed operation is to be achieved. Single electron charging effects in nanowires of silicon or polysilicon can be coupled to conventional MOSFETs or tunnelling barrier structures can be placed at the gate of the MOSFET to make memory cells. Although some of these structures only work at low temperatures some have also demonstrated room temperature operation.
  • Keywords
    semiconductor storage; single electron transistors; MOSFET; SOISET; Si; few electron memory cell; polysilicon nanowire; silicon technology; single electron charging; single electron device; single electron memory cell; tunnelling barrier structure; Laboratories; MOSFETs; Magnetic tunneling; Nanowires; Oxidation; Silicon on insulator technology; Single electron devices; Single electron transistors; Temperature; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
  • Conference_Location
    Washington, DC, USA
  • Print_ISBN
    0-7803-5410-9
  • Type

    conf

  • DOI
    10.1109/IEDM.1999.824170
  • Filename
    824170