• DocumentCode
    1643227
  • Title

    Write, erase and storage times in nanocrystal memories and the role of interface states

  • Author

    Wahl, J.A. ; Silva, H. ; Gokirmak, A. ; Kumar, A. ; Welser, J.J. ; Tiwari, S.

  • Author_Institution
    Sch. of Electr. Eng., Cornell Univ., Ithaca, NY, USA
  • fYear
    1999
  • Firstpage
    375
  • Lastpage
    378
  • Abstract
    In theory, the write, erase, and storage times of nanocrystal memories are intimately related to the coupling between the three-dimensionally confined states of the nanocrystals and the inversion/depletion layer, with the magnitude of coupling strongly dependent on the capture cross-section of the nanocrystal and the parameters of the SiO/sub 2/ tunneling barrier layer. In practice, the extremely strong asymmetry in time-constants suggests additional physical processes in fabricated structures. In this extended abstract, we use frequency-, time- and bias-dependent measurement of charge and channel current to determine the bias-dependent coupling between the nanocrystals and the underlying channel and deconvolute the effects arising from interface states on nanocrystals and percolation transport in the channel.
  • Keywords
    interface states; nanotechnology; semiconductor storage; SiO/sub 2/ tunneling barrier; bias-dependent coupling; capture cross-section; channel current; depletion layer; erase time; interface states; inversion layer; nanocrystal memory; percolation transport; storage time; three-dimensional confined states; write time; Capacitance measurement; Charge measurement; Current measurement; Electrons; Interface states; Nanocrystals; Nonvolatile memory; Thickness control; Tunneling; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
  • Conference_Location
    Washington, DC, USA
  • Print_ISBN
    0-7803-5410-9
  • Type

    conf

  • DOI
    10.1109/IEDM.1999.824173
  • Filename
    824173