Title :
Two-step current-memory cells with optimal dynamic range for advanced CMOS technologies
Author_Institution :
Dept. ISEN, CNRS, Lille, France
Abstract :
Improved two-step current-memory cell architectures employing current conveyors are proposed and compared with conventional ones over a wide range of technologies. Special emphasis is given to the evaluation of performance on very advanced state-of the art CMOS processes and the operation at low supply voltages. Up to 50% power savings can be expected with respect to conventional cells of the same performance
Keywords :
CMOS analogue integrated circuits; circuit optimisation; current conveyors; switched current circuits; advanced CMOS technologies; current conveyors; current-mode analogue interface circuits; dynamic range; low supply voltages; switched-current circuits; two-step current-memory cells; Art; CMOS process; CMOS technology; Circuits; Dynamic range; Low voltage; Memory architecture; Power supplies; Threshold voltage; Variable structure systems;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.704189
