A 24GHz down-conversion mixer with low noise and high gain

In this paper, a down-converting mixer implemented in the TSMC 0.18-μm CMOS process technology for applications in the 24GHz band is presented. For suppressing the flicker noise generated in the switching stage of the conventional Gilbert cell topology, a current bleeding technique combined with negative resistance is adopted to improve the noise figure (NF) of the mixer. In addition, an inductor is utilized to resonate with the parasitic capacitances at the output of the transconductance (Gm) stage and thus increases the power conversion gain (CG) and the linearity of the proposed mixer. The chip size of the proposed mixer is 1.062 × 0.979 mm², and the core circuit consumes a dc power of 5.65mW from the 1.8-V voltage supply. The measured CG and NF for the proposed 24GHz mixer are 8.376dB and 11.6dB, respectively. And the measured 1dB compression point (P1dB) is -8.4dBm at the 24GHz operating frequency.