Title :
5–6 GHz 9.4 mW CMOS direct-conversion passive-mixer receiver with low-flicker-noise corner
Author :
Yu-Chih Hsiao ; Chinchun Meng ; Jin-Siang Syu ; Chung-Yo Lin ; Shyh-Chyi Wong ; Guo-Wei Huang
Author_Institution :
Dept. of Electr. & Comput. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
This paper demonstrates a low-power and low-flicker-noise direct-conversion receiver using double-balanced passive mixer. The deep-n-well vertical-NPN bipolar junction transistor is placed as at the input stage of the IF amplifier to reduce the flicker noise in the 0.18 um standard CMOS process. As a result, conversion gain achieves 50-dB gain when the LO power is 10 dBm and the noise figure is 7-dB at 100 kHz. The totally power consumption is 9.4 mW at 1.8 V voltage supply.
Keywords :
CMOS analogue integrated circuits; bipolar transistors; flicker noise; intermediate-frequency amplifiers; low-power electronics; microwave receivers; mixers (circuits); passive networks; power consumption; power supply circuits; CMOS direct-conversion passive-mixer receiver; IF amplifier; LO power; conversion gain; deep-n-well vertical-NPN bipolar junction transistor; double-balanced passive mixer; frequency 100 kHz; frequency 5 GHz to 6 GHz; gain 50 dB; low-flicker-noise corner; low-flicker-noise direct-conversion receiver; low-power direct-conversion receiver; noise figure; noise figure 7 dB; power 9.4 mW; power consumption; size 0.18 mum; standard CMOS process; voltage 1.8 V; voltage supply; 1f noise; CMOS integrated circuits; CMOS technology; Gain; Mixers; Receivers; direct-conversion receiver; low power; vertical-NPN bipolar junction transistor;
Conference_Titel :
Microwave Integrated Circuits Conference (EuMIC), 2012 7th European
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4673-2302-4
Electronic_ISBN :
978-2-87487-026-2
