DocumentCode
1643617
Title
H.264 parallel decoder at HD resolution on a coarse-grained reconfigurable multi-media system
Author
Wang, Wenjie ; Liu, Leibo ; Yin, Shouyi ; Zhu, Min ; Wang, Yansheng ; Wei, Shaojun
Author_Institution
Res. Center for Mobile Comput., Tsinghua Univ. Inst. of Microelectron., Beijing, China
fYear
2010
Firstpage
2034
Lastpage
2036
Abstract
Reconfigurable Multi-media System (REMUS) is a new coarse-grained reconfigurable processor. This paper describes the parallel implementation of H.264 decoding algorithm on REMUS. First, the pipelined parallel decoding technique is introduced to loosen the strict constraint of real-time decoding. Second, the most computing intensive tasks, such as Motion Compensation (MC), Deblocking and Inverse Discrete Cosine Transform (IDCT), are mapped onto the reconfigurable Processing Element Array (PEA), while the other control-intensive tasks are carried out by the host processor. Simulation shows that based on proposed approaches, REMUS can support H.264 High-Profile (HiP) Level 4 1920×1080@30fps streams at 200 MHz.
Keywords
decoding; discrete cosine transforms; motion compensation; multimedia communication; video coding; H.264 parallel decoder; HD resolution; IDCT; REMUS; coarse-grained reconfigurable multimedia system; control-intensive tasks; deblocking; high-profile level; inverse discrete cosine transform; motion compensation; real-time decoding; reconfigurable processing element array; Automatic voltage control; Computational modeling; Decoding; High definition video; Hip; Streaming media;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-5797-7
Type
conf
DOI
10.1109/ICSICT.2010.5667884
Filename
5667884
Link To Document