DocumentCode
1643667
Title
A research of dual-port SRAM cell using 8T
Author
Zhang, Kai-ji ; Chen, Kun ; Pan, Wei-tao ; Ma, Pei-Jun
Author_Institution
Key Lab. of Wide Band-gap Semicond. Mater. & Devices of Minist. of Educ., Xidian Univ., Xi´´an, China
fYear
2010
Firstpage
2040
Lastpage
2042
Abstract
High speed, low power and compatibility with standard technology Static random access memory (SRAM) is essential for system on chip (SoC) technology. In this paper, we first present a 6T-SRAM (1WR) and two types of 8T-SRAM cell(2WR 1W1R). After that how the (1W1R) cell work with external unit is explained, and we compare the SNM sensitivity and the write/read operations time of 1WR 1W1R cell.
Keywords
SRAM chips; system-on-chip; 1WR 1W1R cell; 6T-SRAM; 8T-SRAM; SNM sensitivity; SoC technology; dual-port SRAM cell; standard technology static random access memory; system on chip; write-read operations time; Arrays; Flip-flops; Inverters; Noise; Random access memory; System-on-a-chip; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-5797-7
Type
conf
DOI
10.1109/ICSICT.2010.5667886
Filename
5667886
Link To Document