Analog VLSI implementation of cellular neural networks

The design of continuous-time (CT) and discrete-time (DT) cellular neural networks (CNNs) using analog VLSI circuit techniques is discussed. A cell model which exhibits advantages for reduced area and power consumption CNN implementations is proposed. This model is very well suited for implementation in the current domain, which is also important for avoiding the need for current-to-voltage dedicated interfaces in image processing tasks with photosensor devices. The cell design relies on the use of current mirrors for the efficient implementation of both linear and nonlinear analog operators. These cells are simpler and easier to design than those found in previously reported CT and DT CNN devices. Basic design issues are covered, together with discussions of the influence of nonidealities and advanced circuit design issues as well as design for manufacturability considerations associated with statistical analysis