Title :
A variation tolerent reconfigurable time difference amplifier
Author :
Kim, SungJin ; Cho, SeongHwan
Author_Institution :
Dept. of EECS, KAIST, Daejeon, South Korea
Abstract :
In this paper, a variation tolerant reconfigurable time difference amplifier (TDA) is presented. The proposed time difference amplifier removes delay lines used in conventional calibration loop which are the most critical bottle-neck for achieving higher gain. A gated mutual exclusive (GMUTEX) circuit and a NAND based ring oscillator enable reconfigurable gain corresponding to an input code word. In addition, a time difference pre-amplifier is employed in phase frequency detector (PFD) of delay locked loop (DLL) to reduce its input phase offset. The proposed TDA is implemented and simulated in 90 nm CMOS, which shows 4 to 128 of reconfigurable gain within 6.3% of absolute gain error and 2.5% fluctuation under PVT variable condition.
Keywords :
CMOS analogue integrated circuits; delay lock loops; differential amplifiers; oscillators; CMOS; NAND ring oscillator; absolute gain error; delay locked loop; gated mutual exclusive circuit; phase frequency detector; reconfigurable gain; reconfigurable time difference amplifier; size 90 nm; variation tolerant time difference amplifier; CMOS technology; Calibration; Circuit simulation; Counting circuits; Delay effects; Delay lines; Frequency; Ring oscillators; Signal processing; Switches; DLL; MUTEX; PVT tolerant; Time Difference Amplifier; reconfigurable;
Conference_Titel :
SoC Design Conference (ISOCC), 2009 International
Conference_Location :
Busan
Print_ISBN :
978-1-4244-5034-3
Electronic_ISBN :
978-1-4244-5035-0
DOI :
10.1109/SOCDC.2009.5423787
