Title :
Intra-field gate CD variability and its impact on circuit performance
Author :
Orshansky, M. ; Milor, L. ; Ly Nguyen ; Hill, G. ; Yeng Peng ; Chenming Hu
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
Statistical analysis of an advanced CMOS process reveals a significant systematic within-field variability of gate CD strongly dependent on the local layout patterns. We present a novel modeling methodology for accurate prediction of the effect of such CD variability on circuit performance that enables statistical design for increased performance and yield. We also propose a mask-level gate CD correction algorithm allowing significant reduction of overall variability and provide a model to evaluate the effectiveness of correction.
Keywords :
CMOS integrated circuits; circuit simulation; integrated circuit layout; integrated circuit modelling; integrated circuit yield; masks; statistical analysis; advanced CMOS process; circuit performance; intra-field gate CD variability; local layout patterns; mask-level gate CD correction algorithm; modeling methodology; statistical design; within-field variability; yield; CMOS process; Circuit analysis; Circuit optimization; Lenses; Predictive models; Resists; Semiconductor device measurement; Semiconductor device modeling; Statistical analysis; Testing;
Conference_Titel :
Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-5410-9
DOI :
10.1109/IEDM.1999.824197
