Title :
VLSI multiprocessor implementation of block state-space 2-D digital filters
Author :
Dabbagh, M.Y. ; Alexander, W.E.
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
Abstract :
The problem of implementing block state-space two-dimensional digital filters in a VLSI environment is considered. Two implementation structures, namely, the delay and interleaving structures, are used. Both structures are modular and require local communications which are important for VLSI implementation. In addition, the structures achieve linear speedup and involve matrix and vector operations which are suitable for multiprocessor systems such as VLSI array processors
Keywords :
VLSI; cellular arrays; digital signal processing chips; parallel architectures; two-dimensional digital filters; VLSI array processors; VLSI implementation; VLSI multiprocessor implementation; block state-space 2-D digital filters; delay structures; implementation structures; interleaving structures; linear speedup; local communications; matrix operations; modular structures; multiprocessor systems; vector operations; Delay; Digital filters; Dynamic range; Equations; Frequency; Interleaved codes; Multiprocessing systems; Noise reduction; Throughput; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location :
Portland, OR
DOI :
10.1109/ISCAS.1989.100545
