Title :
Ultra-low leakage 0.16 /spl mu/m CMOS for low-standby power applications
Author :
Wu, C.C. ; Diaz, C.H. ; Lin, B.L. ; Chang, S.Z. ; Wang, C.C. ; Liaw, J.J. ; Wang, C.H. ; Young, K.K. ; Lee, K.H. ; Liew, B.K. ; Sun, J.Y.C.
Author_Institution :
SBIP, Hsin-Chu, Taiwan
Abstract :
In this work, low leakage 0.16 /spl mu/m CMOS devices (T/sub ox/=32 /spl Aring/) with various off-state leakage currents (I/sub off/) were fabricated and studied for low standby power applications. Specifically two different device designs are introduced here. One design code named LP is targeted for worst-case I/sub off/<3 pA//spl mu/m. Another design, code named ULP (ultra low-power), is targeted for even stringent worst-case I/sub off/<0.3 pA//spl mu/m. This work demonstrates n/pMOSFETs with 575/230 and 370/165 /spl mu/A//spl mu/m drive currents @1.8 V for LP and ULP specifications respectively. Cobalt salicide process was also optimized for low junction leakage (<100 pA/cm). The 0.16 /spl mu/m process capability for ultra-low power applications was demonstrated using a CMOS 4 Mbit SRAM with measured minimum standby current <0.2 /spl mu/A at the single power supply voltage V/sub CC/=3 V.
Keywords :
CMOS memory circuits; SRAM chips; circuit CAD; integrated circuit design; integrated circuit metallisation; leakage currents; low-power electronics; 0.16 micron; 1.8 V; 3 V; 4 Mbit; CMOS; CoSi/sub 2/; LP design code; SRAM; ULP design code; drive currents; junction leakage; low-standby power applications; minimum standby current; off-state leakage currents; salicide process; ultra-low power applications; Application specific integrated circuits; CMOS process; Cobalt; Current measurement; Implants; Leakage current; MOSFETs; Manufacturing industries; Power measurement; Random access memory;
Conference_Titel :
Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-5410-9
DOI :
10.1109/IEDM.1999.824241
