• DocumentCode
    1644971
  • Title

    IEEE: 1141.1 applied to mixed TTL-ECL and differentlal logic

  • Author

    Andrews, John

  • fYear
    1995
  • Firstpage
    91
  • Abstract
    Although IEEE 1149.1-1990 has been primarily applied as a boundary-scan (B/S) standard to transistor-transistor logic (TTL) compatible systems, the standard is logicfamily independent. This paper makes recommendations for the application of 1149.1 to both mixed family TTL-ECL modules and to differential logic signals. It compares the use of one or two output cells and one, two or three input cells and makes recommendations for the optimum application of 1149.1 to differential logic signals.
  • Keywords
    Cache memory; Digital systems; Guidelines; Logic circuits; Logic design; Logic testing; Pins; Power supplies; System performance; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1992. Proceedings., International
  • Conference_Location
    Baltimore, MD
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-0760-7
  • Type

    conf

  • DOI
    10.1109/TEST.1992.527808
  • Filename
    527808