• DocumentCode
    1645067
  • Title

    Partial decomposition of digital-to-analog converters

  • Author

    Andersson, K. Ola ; Vesterbacka, Mark

  • Author_Institution
    Dept. of E.E., Linkoping Univ., Sweden
  • Volume
    1
  • fYear
    2004
  • Firstpage
    193
  • Abstract
    The decomposed DAC architecture was recently proposed as an alternative to the traditional segmented architecture. In this work, we present a modified version of the decomposed architecture with reduced hardware complexity denoted the partially decomposed architecture. Behavioral-level simulations indicate that the partially decomposed architecture is a good alternative for signals with Gaussian distribution, whereas the original decomposed or segmented architectures are preferred for sinusoidal signals.
  • Keywords
    Gaussian distribution; circuit layout; digital-analogue conversion; Gaussian distribution; behavioral-level simulations; decomposed DAC architecture; digital-to-analog converters; hardware complexity; partial decomposition; segmented architecture; sinusoidal signals; Circuits; Digital control; Digital-analog conversion; Encoding; Error correction; Gaussian distribution; Hardware; Linearity; Signal resolution; Weight control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrotechnical Conference, 2004. MELECON 2004. Proceedings of the 12th IEEE Mediterranean
  • Print_ISBN
    0-7803-8271-4
  • Type

    conf

  • DOI
    10.1109/MELCON.2004.1346806
  • Filename
    1346806