Title :
A low-noise CMOS receiver frontend for MRI
Author :
Anders, Jens ; Boero, Giovanni
Author_Institution :
Ecole Polytech. Fed. de Lausanne, Lausanne
Abstract :
In this paper a novel architecture for an integrated receiver front-end for micro magnetic resonance imaging (micro-MRI) applications is described. While the chip consumes only 9 mA supply current (4 mA in the LNA and 5 mA in the output buffer) from a 3.3 V power supply, it has a measured input referred noise density of only 0.6 nV/radic(Hz). The receiver consists of a reception coil, an on-chip tuning capacitor, a low-noise amplifier, and a 50 Omega output buffer. The system is designed for operation in a B0-field of 7 T corresponding to a frequency of 300 MHz. It is implemented in a 0.35 mum CMOS high-voltage process and occupies a chip area of 850 mum times 500 mum.
Keywords :
CMOS integrated circuits; biomedical MRI; biomedical electronics; buffer circuits; circuit tuning; integrated circuit noise; MRI; current 4 mA; current 5 mA; current 9 mA; integrated receiver; low noise CMOS receiver frontend; low noise amplifier; magnetic flux density 7 T; micro magnetic resonance imaging; on-chip tuning capacitor; output buffer; reception coil; resistance 50 ohm; size 0.35 mum; voltage 3.3 V; Coils; Current measurement; Current supplies; Density measurement; Magnetic noise; Magnetic resonance imaging; Noise measurement; Power measurement; Power supplies; Semiconductor device measurement;
Conference_Titel :
Biomedical Circuits and Systems Conference, 2008. BioCAS 2008. IEEE
Conference_Location :
Baltimore, MD
Print_ISBN :
978-1-4244-2878-6
Electronic_ISBN :
978-1-4244-2879-3
DOI :
10.1109/BIOCAS.2008.4696900
