A 1.2V, 60-GHz radio receiver with on-chip transformers and inductors in 90-nm CMOS

This paper describes an integrated 60-GHz receiver in 90-nm CMOS including an LNA and downconversion mixer as well as LO and IF buffers. Transformer baluns are used for S/D conversion of the RF and LO signals to allow for conventional double-balanced mixing. The single-ended downconversion gain of a 60 GHz signal to a 5 GHz IF is 16 dB with an input compression point of-21 dBm while consuming 60 mW of power. The DSB noise figure is below 7 dB over the entire IF bandwidth which is greater than 1 GHz. The use of spiral inductors and transformers as matching elements resulted in a die area of only 600 mum times 475 mum including pads