Title :
Bit synchronizer performance in the presence of signal transition variation
Author_Institution :
Dept. of Electr. Eng., California State Univ., Long Beach, CA, USA
Abstract :
The author addresses the effect on the performance of the DTTL (data transition tracking loop) symbol synchronizer of the signal transition variation due to signal transition density, data asymmetry, and sinusoidal modulation. It is shown that the combination of these factors will indeed affect the DTTL performance, e.g. clock jitter and cycle slippage rate, and that worst-case performance may result if the parameters are not well selected. Typical numerical results are shown.<>
Keywords :
digital communication systems; signal detection; synchronisation; tracking systems; clock jitter; cycle slippage rate; data asymmetry; data transition tracking loop; signal detection; signal transition density; signal transition variation; sinusoidal modulation; symbol synchronizer; Bandwidth; Baseband; Clocks; Design engineering; Frequency synchronization; Jitter; Optical signal processing; Signal design; Signal to noise ratio; Timing;
Conference_Titel :
Aerospace Applications Conference, 1989. Digest., 1989 IEEE
Conference_Location :
Breckenridge, CO, USA
DOI :
10.1109/AERO.1989.82426
