Design of LDO linear regulator with ultra low-output impedance buffer

Author

Choi, Jungsu ; Park, Jungeui ; Jeong, Wooju ; Lee, Junsang ; Lee, Seok ; Yoon, Jayang ; Kim, Jaehoon ; Choi, Joongho

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Seoul, Seoul, South Korea

fYear

2009

Firstpage

420

Lastpage

423

Abstract

This paper presents a low-dropout (LDO) linear regulator using ultra-low output resistance buffer for frequency compensation. The proposed buffer achieves ultra low output impedance with dual shunt feedback loops, which makes it possible to improve load and line regulations as well as the transient response for low voltage applications. A reference control scheme for programmable output voltage of the LDO is presented. The designed LDO linear regulator works under the input voltage of 2.5~5.5 V and provides up to 300 mA load current for an output voltage range of 0.6~3.3 V.

Keywords

CMOS integrated circuits; buffer circuits; integrated circuit design; integrated circuit manufacture; current 300 mA; dual shunt feedback loops; frequency compensation; low-dropout linear regulator design; ultra low-output impedance buffer; ultra-low output resistance buffer; voltage 0.6 V to 5.5 V; Capacitors; Circuits; Energy management; Frequency; Impedance; Low voltage; Paramagnetic resonance; Parasitic capacitance; Regulators; Stability; Compensation; LDO; Linear Regulator; Programmable Output Voltage; Ultra-Low Output Buffer;

fLanguage

English

Publisher

ieee

Conference_Titel

SoC Design Conference (ISOCC), 2009 International

Conference_Location

Busan

Print_ISBN

978-1-4244-5034-3

Electronic_ISBN

978-1-4244-5035-0

Type

conf

DOI

10.1109/SOCDC.2009.5423864

Filename

5423864