Title :
Extraction of the gate oxide thickness of N- and P-Channel MOSFETs below 20 /spl Aring/ from the substrate current resulting from valence-band electron tunneling
Author :
Shanware, A. ; Shiely, J.P. ; Massoud, H.Z. ; Vogel, E. ; Henson, K. ; Srivastava, A. ; Osburn, C. ; Hauser, J.R. ; Wortman, J.J.
Author_Institution :
Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
Abstract :
This paper introduces a method for the determination of the gate oxide thickness, X/sub ox/, of N- and P-Channel MOSFETs with ultrathin oxides based on the characterization and modeling of the substrate current resulting from valence-band electron tunneling (VBET) in the direct-tunneling (DT) regime. Under certain bias conditions, valence-band electron tunneling becomes the main constituent of the substrate currents in N- and P-MOSFETs. This method has several advantages over other methods for the determination of X/sub ox/, and yields values of X/sub ox/ that agree well with those obtained from modeling capacitance-voltage characteristics, C(V), while taking quantum-mechanical effects into account. Its main advantage is that it is not limited by the oxide thickness.
Keywords :
MOSFET; current density; semiconductor device measurement; semiconductor device models; thickness measurement; tunnelling; valence bands; 1.5 to 3.5 nm; NMOSFETs; PMOSFETs; bias conditions; capacitance-voltage characteristics; direct-tunneling regime; gate oxide thickness determination; oxide scaling; physical modeling; quantum-mechanical effects; substrate current; valence-band electron tunneling; Artificial intelligence; Capacitance-voltage characteristics; Electrons; Laboratories; MOS devices; MOSFET circuits; Quantization; Rapid thermal processing; Substrates; Tunneling;
Conference_Titel :
Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-5410-9
DOI :
10.1109/IEDM.1999.824274