Full stacked layout of analogue cells

Author

Gatti, Umberto ; Maloberti, Franco ; Liberali, Valentino

Author_Institution

Dept. of Electron., Pavia Univ., Italy

fYear

1989

Firstpage

1123

Abstract

A program for the automatic layout of analogue CMOS cells using the full stacked approach is described. The stacked approach consists of the division of large transistors into several parallel elementary transistors, and of their accommodation in one or more parallel stacks made of the same number of transistors. The general rules for the design of stacked structures are discussed, and topological solutions of some popular schemes of operational amplifiers are presented. The stacked architecture is generated in a symbolic way, and it is automatically translated into the physical layout on the basis of the geometrical parameters and the technological design rules

Keywords

CMOS integrated circuits; VLSI; cellular arrays; circuit layout CAD; linear integrated circuits; operational amplifiers; analogue CMOS cells; automatic layout; design of stacked structures; division of large transistors; full stacked approach; full stacked layout of analogue cells; geometrical parameters; physical layout; schemes of operational amplifiers; stacked architecture; technological design rules; Analog computers; Analog integrated circuits; CMOS analog integrated circuits; Design automation; Digital circuits; Integrated circuit interconnections; Integrated circuit technology; MOSFETs; Operational amplifiers; Shape;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1989., IEEE International Symposium on

Conference_Location

Portland, OR

Type

conf

DOI

10.1109/ISCAS.1989.100550

Filename

100550