A low-power integrated circuit for analog spike detection and sorting in neural prosthesis systems

Since the proof of viability of prosthetic devices directly controlled by neurons, there is a huge increase in the interest on integrated multichannel recording systems to register neural signals with implanted chronic electrodes. One of the bottlenecks in such compact systems is the limited rate of data transmission by the wireless link, requiring some sort of data compression/reduction. We propose an analog low power integrated system for action potential (AP) detection and sorting that reduces the output data rate ~100 times. In this system, AP detection is performed by a double threshold method that reduces the probability of false detections while AP sorting is based on the measurement of peak and trough amplitudes and peak width. The circuit has been implemented in 0.35 - mum CMOS technology with power consumption of 70 muW per channel including the pre-amplifier. The system was tested with real recorded traces: compared to standard AP sorting techniques, the proposed simple AP sorter was able to correctly assign to single units over 90% of detected APs.