Title :
Equivalent circuit model for thermal resistance of deep trench isolated bipolar transistors
Author :
Rashmi ; Armstrong, G.A. ; Harrington, S.J. ; Bousquet, A. ; Nigrin, S.
Author_Institution :
Sch. of Electron., Electr. Eng. & Comput. Sci., Queen´´s Univ. Belfast, Belfast, UK
Abstract :
An equivalent circuit model for thermal resistance of deep trench isolated bipolar transistors on conventional SOI and compound buried layer (CBL) substrates has been proposed to investigate the thermal resistance behaviour in a 3×3 array of similar devices. The model is based on 3D electro-thermal simulations with realistic boundary conditions for increased accuracy. The simulations and circuit model show an excellent agreement with the measurements. Results suggest that a separation in the range 2 to 4 μm between two adjacent devices in an array would be sufficient to limit the rise in thermal resistance due to thermal coupling.
Keywords :
bipolar transistors; silicon-on-insulator; thermal resistance; 3D electrothermal simulations; compound buried layer substrates; conventional SOI; deep trench isolated bipolar transistors; distance 2 mum to 4 mum; equivalent circuit model; thermal coupling; thermal resistance; Artificial neural networks; Equivalent circuits; Integrated circuit modeling; Solid modeling; Substrates; Thermal resistance; 3D Simulations; Bipolar transistors; Deep trench isolation (DTI); Electro-thermal; Multiple finger; Silicon-on-insulator (SOI); Thermal resistance;
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2010 IEEE
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-8578-9
DOI :
10.1109/BIPOL.2010.5667979
