Title :
Thermal testing methods to increase system reliability
Author :
Szekely, V. ; Rencz, M. ; Courtois, B.
Author_Institution :
Dept. of Electron Devices, Tech. Univ. Budapest, Hungary
Abstract :
The scaling down of ICs and the increased packaging densities have resulted in increased concern about thermal issues during the design of ICs and their packages. In this paper newly developed design and testing methods are presented. The SISSSI electro-thermal simulator predicts the layout dependent electro-thermal behaviour of circuits. The presented CMOS temperature sensors and the idea of DFTT designs assure on-line temperature monitoring of circuits and packages. Also presented is a thermal transient testing method enables accurate thermal characterization of packages both for design and verification purposes. The capabilities of the new tools are demonstrated with application examples
Keywords :
CMOS integrated circuits; boundary scan testing; circuit analysis computing; design for testability; integrated circuit layout; integrated circuit modelling; integrated circuit packaging; integrated circuit reliability; integrated circuit testing; monitoring; temperature sensors; thermal analysis; CMOS temperature sensors; DFTT designs; SISSSI electro-thermal simulator; layout dependent electro-thermal behaviour; online temperature monitoring; system reliability; thermal characterization; thermal testing methods; thermal transient testing method; Capacitance; Circuit testing; Heat transfer; Packaging; Resistance heating; System testing; Temperature sensors; Thermal conductivity; Thermal factors; Thermal resistance;
Conference_Titel :
Semiconductor Thermal Measurement and Management Symposium, 1997. SEMI-THERM XIII., Thirteenth Annual IEEE
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-3793-X
DOI :
10.1109/STHERM.1997.566798
