Automated dimensioning of MOS transistors without using topology-specific explicit formulas

Automated dimensioning techniques for analog circuit design are described. A novel method called COARSE, which is especially suitable for CMOS operational amplifier optimization, is proposed. The method avoids the need for iteratively solving nonlinear equations within the optimization loop by rearranging the variables and objectives of the problem. The DC operating point is varied to yield optimal AC characteristics and physically minimized devices. The APLAC programming environment and the implementation of the COARSE method using APLAC are presented. Experience and views gained in using these tools in the design of a low-power sinewave generator are discussed