Title :
Improved Design and Characterization Method for Very High Speed Bipolar Circuits
Author :
Kasbari, Abed-Elhak ; Ouslimani, Achour ; Blayac, Sylvain ; Konczykowska, Agnieszka
Abstract :
An improved design method for high speed bipolar circuits is presented. It uses iso base-collector capacitance curves superposed to the duty cycles plots in the (Ic,Vce) plane. This new optimization way gives the optimum operating region for each transistor of a bipolar circuit to reach the best trade-off between the switching speed and the power consumption. Electrical design of emitter-coupled pair, which constitutes the basis of emitter-coupled logic (ECL) circuits, is detailed to explain the design method. Each part of the measurement set-up is characterized in time and frequency domains to improve the measurement method. These improvements have enabled the design and characterization of InP double-heterojunction-bipolar transistor master-slave D-type flip-flop circuits. 40 Gb/s measurement with more than 85% eye-diagram opening validates this method.
Keywords :
flip-flops; frequency-domain analysis; heterojunction bipolar transistors; indium compounds; logic circuits; network synthesis; optimisation; semiconductor devices; InP; base-collector capacitance curves; bipolar transistor circuit; bit rate 40 Gbit/s; double-heterojunction-bipolar transistor; duty cycles plots; electrical design; emitter-coupled logic circuits; frequency domains; master-slave D-type flip-flop circuits; measurement method; power consumption; very high speed bipolar circuits; Bipolar transistor circuits; Capacitance; Design methodology; Energy consumption; Frequency domain analysis; Frequency measurement; Logic circuits; Logic design; Switching circuits; Time measurement;
Conference_Titel :
Millimeter Waves, 2008. GSMM 2008. Global Symposium on
Conference_Location :
Nanjing
Print_ISBN :
978-1-4244-1885-5
Electronic_ISBN :
978-1-4244-1886-2
DOI :
10.1109/GSMM.2008.4534641
