Title :
A novel approach to simulate the effect of optical proximity on MOSFET parametric yield
Author :
Balasinski, A. ; Gangala, H. ; Axelrad, V. ; Boksha, V.
Author_Institution :
Cypress Semicond., San Jose, CA, USA
Abstract :
A simulation procedure to quantify the effect of process variations of mask making and photolithography on MOSFET performance and parametric yield is proposed. Dense layout of 0.16 /spl mu/m six-transistor SRAM cell was used. Firstly, the accuracy of optical proximity correction (OPC) of gate layout was verified by two-step simulation of mask and photoresist pattern. This was followed by the extraction of channel length dependent MOSFET drive current for the different OPC serif and misalignment options within the corresponding process latitudes. Finally, parametric yield was simulated based on statistical distributions of MOSFET parameters.
Keywords :
MOS memory circuits; SRAM chips; circuit layout CAD; circuit simulation; integrated circuit layout; integrated circuit yield; masks; photolithography; proximity effect (lithography); 0.16 micron; MOSFET parametric yield; channel length dependent MOSFET drive current; gate layout; mask making; misalignment options; optical proximity; photolithography; photoresist pattern; process variations; six-transistor SRAM cell; statistical distributions; two-step simulation; Lithography; MOSFET circuits; Manufacturing; Nonlinear optics; Optical design; Optical sensors; Random access memory; Resists; Shape; Statistical distributions;
Conference_Titel :
Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-5410-9
DOI :
10.1109/IEDM.1999.824297
