Title :
Ultra-thin body SOI MOSFET for deep-sub-tenth micron era
Author :
Yang-Kyu Choi ; Asano, K. ; Lindert, N. ; Subramanian, V. ; Tsu-Jae King ; Bokor, J. ; Chenming Hu
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
A 40nm-gate-length ultra-thin body (UTB) nMOSFET is demonstrated. A self-aligned thin body SOI device has previously been proposed for suppressing the short channel effect. UTB structure can eliminate the punchthrough path between source and drain and provide a more evolutionary alternative to the double-gate MOSFET for deep-sub-tenth micron technology. The advantage of using UTB is illustrated through device simulation (with the aid of Silvaco ATLAS) using simple doping profiles for the body and S/D (simple Gaussian).
Keywords :
CMOS integrated circuits; MOSFET; VLSI; doping profiles; semiconductor device models; silicon-on-insulator; 40 nm; CMOS technology; Si; Silvaco ATLAS; UTB; deep-sub-tenth micron technology; device simulation; doping profiles; punchthrough path; ultra-thin body SOI MOSFET; CMOS process; CMOS technology; Doping profiles; Fabrication; Immune system; Lithography; MOSFET circuits; Oxidation; Resists; Threshold voltage;
Conference_Titel :
Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-5410-9
DOI :
10.1109/IEDM.1999.824298
