• DocumentCode
    1646588
  • Title

    An Evaluation of I/sub DDQ/ Versus Conventional Testing for CMOS Sea-of-Gate IC´s

  • Author

    Sawada, K. ; Kayano, S.

  • fYear
    1995
  • Firstpage
    158
  • Keywords
    Automatic test pattern generation; CMOS integrated circuits; CMOS logic circuits; CMOS technology; Circuit testing; Logic circuits; Logic design; Logic testing; Paper technology; Semiconductor device measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1992. Proceedings., International
  • Conference_Location
    Baltimore, MD
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-0760-7
  • Type

    conf

  • DOI
    10.1109/TEST.1992.527816
  • Filename
    527816
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1646588