DocumentCode
1646690
Title
ALU-array based reconfigurable accelerator for energy efficient executions
Author
Inoue, Koji ; Noori, Hamid ; Mehdipour, Farhad ; Hanada, Takaaki ; Murakami, Kazuaki
Author_Institution
Dept. of Adv. Inf. Technol., Kyushu Univ., Fukuoka, Japan
fYear
2009
Firstpage
157
Lastpage
160
Abstract
This paper introduces an energy efficient acceleration technique for embedded microprocessors. By means of supporting an ALU-array based coarse-grain reconfigurable functional unit, well customized special instructions are identified and executed for each application program. Since the reconfigurable functional unit can execute several dependent instructions (a sequence of instructions), simultaneously, the performance of the base microprocessor can dramatically be improved. In addition, this kind of direct execution is very energy efficient because it reduces activation counts of hardware components such as instruction cache, branch predictor, register-file accesses, and so on.
Keywords
acceleration; digital arithmetic; embedded systems; microprocessor chips; ALU-array based reconfigurable accelerator; arithmetic logic unit array; base microprocessor; branch predictor; coarse-grain reconfigurable functional unit; embedded microprocessors; energy efficient acceleration technique; instruction cache; register-file access; Acceleration; Clocks; Counting circuits; Embedded system; Energy efficiency; Hardware; Information technology; Microarchitecture; Microprocessors; Registers; acceleration; energy-efficient execution; reconfigurable computing;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference (ISOCC), 2009 International
Conference_Location
Busan
Print_ISBN
978-1-4244-5034-3
Electronic_ISBN
978-1-4244-5035-0
Type
conf
DOI
10.1109/SOCDC.2009.5423898
Filename
5423898
Link To Document