DocumentCode
1646711
Title
Minimization of passive circuits losses realized on low resistivity silicon using micro-machining techniques and thick polymer layers
Author
Bouchriha, F. ; Grenier, K. ; Dubuc, D. ; Pons, P. ; Plana, R. ; Graffeuil, J.
Author_Institution
Lab. d´Autom. et d´Anal. des Syst., CNRS, Toulouse, France
Volume
2
fYear
2003
Firstpage
959
Abstract
In this paper, a novel technological solution using both silicon surface micromachining and thick polymer layer deposition on low resistivity silicon substrate (20 /spl Omega//cm) has been investigated. The proposed structure achieves both a low attenuation level and a high quality factor. The silicon etching into the coplanar slots leads indeed to a noticeable decrease of the losses, whereas filling the gaps with the polymer BCB avoids a degradation of the effective permittivity.
Keywords
Q-factor; coplanar transmission lines; coplanar waveguides; dielectric losses; elemental semiconductors; micromachining; permittivity; polymer films; silicon; CPW lines; Si; benzocyclobutene dielectric layers; coplanar slot silicon etching; coplanar transmission lines/waveguides; dielectric losses; effective permittivity; high Q circuits; low attenuation CPW; low resistivity silicon substrate circuits; passive circuit loss minimization; polymer BCB filled gaps; silicon surface micromachining; thick polymer layer deposition; Attenuation; Conductivity; Etching; Filling; Micromachining; Minimization; Passive circuits; Polymers; Q factor; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 2003 IEEE MTT-S International
Conference_Location
Philadelphia, PA, USA
ISSN
0149-645X
Print_ISBN
0-7803-7695-1
Type
conf
DOI
10.1109/MWSYM.2003.1212528
Filename
1212528
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