DocumentCode
1646959
Title
The architecture of an FPGA-style programmable fuzzy logic controller chip
Author
Lund, T. ; Torralba, A. ; Carvajal, R.G.
Author_Institution
Sch. of Comput., Canberra Univ., Canberra, ACT, Australia
fYear
2000
fDate
6/22/1905 12:00:00 AM
Firstpage
51
Lastpage
56
Abstract
In the search for a fuzzy logic equivalent of the FPGA, the authors have developed the design for a programmable fuzzy logic controller chip which can accept up to 4 inputs, provide up to 12 programmable membership functions to fuzzify those inputs, and provide up to 8 programmable singleton values from which an output can be synthesised. Up to 64 rules can be evaluated simultaneously. The analogue modules which perform the fuzzification, rule evaluation and defuzzification operations are interconnected in a programmable fashion, modelled on the structure of FPGAs. This design will require an area of about 6 mm2 in 0.8 μm CMOS technology and draw about 9 mA
Keywords
field programmable gate arrays; fuzzy logic; FPGA; defuzzification; fuzzification; fuzzy logic controller; rule evaluation; Australia; CMOS technology; Computer architecture; Field programmable gate arrays; Fuzzy control; Fuzzy logic; Integrated circuit interconnections; Logic design; Programmable logic arrays; Read only memory;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture Conference, 2000. ACAC 2000. 5th Australasian
Conference_Location
Canberra, ACT
Print_ISBN
0-7695-0512-0
Type
conf
DOI
10.1109/ACAC.2000.824322
Filename
824322
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