DocumentCode :
1647345
Title :
A hardware-efficent multi-character string matching architecture using brute-force algorithm
Author :
Ahn, Seongyong ; Hong, Hyejong ; Kim, Hyunjin ; Ahn, Jin-Ho ; Baek, Dongmyong ; Kang, Sungho
Author_Institution :
Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea
fYear :
2009
Firstpage :
464
Lastpage :
467
Abstract :
Due to the growth of network environment complexity, the necessity of packet payload inspection at application layer is increased. String matching, which is critical to network intrusions detection systems, inspects packet payloads and detects malicious network attacks using a set of rules. Because string matching is a computationally intensive task, hardware based string matching is required. In this paper, we propose a hardware-efficient string matching architecture using the brute-force algorithm. A process element that organizes the proposed architecture is optimized by reducing the number of the comparators. The performance of the proposed architecture is nearly equal to a previous work. The experimental results show that the proposed architecture with any process width reduces the comparator requirements in comparison with the previous work.
Keywords :
security of data; string matching; brute-force algorithm; computationally intensive task; hardware-efficent multicharacter string matching architecture; malicious network attacks; network intrusions detection systems; packet payload inspection; Computer architecture; Costs; Ethernet networks; Filters; Hardware; Inspection; Intrusion detection; Next generation networking; Pattern matching; Payloads; brute-force algorithm; deep packet inspection; network intrusion detection system; string matching;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2009 International
Conference_Location :
Busan
Print_ISBN :
978-1-4244-5034-3
Electronic_ISBN :
978-1-4244-5035-0
Type :
conf
DOI :
10.1109/SOCDC.2009.5423922
Filename :
5423922
Link To Document :
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