Design and measurement of very high bitrate digital ICs fabricated in InP HBT technology

Author

Konczykowska, A. ; Blayac, S. ; Jorge, F. ; Riet, M. ; Puyal, V. ; Godin, J.

Author_Institution

Alcatel R&I/OPTO+, Marcoussis, France

Volume

2

fYear

2003

Firstpage

1177

Abstract

In this paper we present various design aspects of very high bitrate ICs and in particular electrical simulation and transistor modelling. Circuits are fabricated in a self-aligned InP DHBT technology. High speed selector design is used as an illustration. Circuit measurements show excellent operation at 80 Gb/s (measurement set-up limitation). Circuit operation as a 40 Gb/s NRZ to RZ converter was also characterised.

Keywords

III-V semiconductors; bipolar digital integrated circuits; circuit simulation; heterojunction bipolar transistors; high-speed integrated circuits; indium compounds; integrated circuit design; integrated circuit measurement; multiplexing equipment; semiconductor device models; time division multiplexing; 40 Gbit/s; 80 Gbit/s; InP; InP HBT technology; InP-InGaAs; NRZ to RZ converter; circuit measurements; circuit operation; design aspects; electrical simulation; electrical time division multiplex; high speed multiplexers; high speed selector design; self-aligned InP DHBT technology; transistor modelling; very high bitrate digital ICs; Bit rate; Circuit simulation; DH-HEMTs; Fabrication; Frequency; Heterojunction bipolar transistors; Indium phosphide; Multiplexing; Threshold voltage; Velocity measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest, 2003 IEEE MTT-S International

Conference_Location

Philadelphia, PA, USA

ISSN

0149-645X

Print_ISBN

0-7803-7695-1

Type

conf

DOI

10.1109/MWSYM.2003.1212578

Filename

1212578