Title :
High-Speed Redundant Modulo 2n-1 Adder
Author :
Kharbash, F. ; Chaudhry, G.M.
fDate :
3/8/2006 12:00:00 AM
Keywords :
Adders; Cities and towns; Computer science; Delay; Digital arithmetic; Digital signal processing; Equations; Error correction; Fault detection; Hardware;
Conference_Titel :
Computer Systems and Applications, 2006. IEEE International Conference on.
Print_ISBN :
1-4244-0211-5
DOI :
10.1109/AICCSA.2006.205071