VLSI-realizable multiplier-free interpolators for high-order sigma-delta D/A converters

A class of efficient linear-phase FIR interpolators for superresolution sigma-delta digital-to-analog (D/A) converters are introduced. These interpolators contain no general multipliers and very few data memory locations, thereby making them easily VLSI-realizable. This is achieved by using several interpolation stages with each stage containing a small number of delays and arithmetic operations. The proposed interpolators can be used, with very slight changes, for many interpolation ratios. As an example, an interpolator is designed for a 20-b overall performance in the case of a fifth-order noise shaper