DocumentCode
1649440
Title
Solving the Minimum-Cost Satisfiability Problem Using SAT Based Branch-and-Bound Search
Author
Fu, Zhaohui ; Malik, Sharad
Author_Institution
Dept. of Electr. Eng., Princeton Univ., NJ
fYear
2006
Firstpage
852
Lastpage
859
Abstract
Boolean satisfiability (SAT) has seen many successful applications in various fields, such as electronic design automation (EDA) and artificial intelligence (AI). However, in some cases it may be required/preferable to use variations of the general SAT problem. In this paper we consider one important variation, the minimum-cost satisfiability problem (MinCostSAT). MinCostSAT is a SAT problem which minimizes the cost of the satisfying assignment. MinCostSAT has various applications, e.g. automatic test pattern generation (ATPG), FPGA routing, AI planning, etc. This problem has been tackled before - first by covering algorithms, e.g. scherzo (Coudert, 1996), and more recently by SAT based algorithms, e.g. bsolo (Manquinho and Marques-Silva, 2002). However the SAT algorithms they are based on are not the current generation of highly efficient solvers. The solvers in this generation, e.g. Chaff (Moskewicz et al., 2001), MiniSat (Een and Sorensson, 2006) etc., incorporate several new advances, e.g. two literal watching based Boolean Constraint Propagation, that have delivered order of magnitude speedups. We first point out the challenges in using this class of solvers for the MinCostSAT problem and then present techniques to overcome these challenges. The resulting solver MinCostChaff shows order of magnitude improvement over several current best known branch-and-bound solvers for a large class of problems, ranging from minimum test pattern generation, bounded model checking in EDA to graph coloring and planning in AI
Keywords
computability; constraint handling; tree searching; Boolean constraint propagation; Boolean satisfiability; SAT based branch-and-bound search; minimum-cost satisfiability problem; Artificial intelligence; Automatic test pattern generation; Business continuity; Costs; Counting circuits; Design optimization; Electronic design automation and methodology; Field programmable gate arrays; Permission; Test pattern generators; Boolean Satisfiability; Branch-and-Bound; MinCostSAT;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 2006. ICCAD '06. IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Print_ISBN
1-59593-389-1
Electronic_ISBN
1092-3152
Type
conf
DOI
10.1109/ICCAD.2006.320089
Filename
4110137
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